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Addressing Process Variations at the Microarchitecture and System Level
Cód:
491_9781601986580
Technology scaling has resulted in an increasing magnitude of and sensitivity to manufacturingprocess variations. This has led to the adoption of statistical design methodologies as opposed to conventional static design techniques. At the same time, increasing design complexity has motivated a shift towards higher levels of design abstraction, i.e., microarchitecture and system level design.This monograph provides the reader with an introduction to recently proposed techniques thataddress one or more of these challenges. It surveys emerging statistical design techniquestargeted towards the analysis and mitigation of process variation at the system level designabstraction, for both conventional planar and emerging 3D integrated circuits. The topicscovered include variability macro-modeling for logic modules, system level variability analysisfor multi-core systems, and system level variability mitigation techniques.The monograph uses illustrative and detailed examples to help explain the various techniquescovered. It concludes with some pointers to future work that looks beyond conventionalCMOS technology and highlights the relevance of system level variability analysis andmitigation techniques for emerging technologies.
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